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Zhang, Y.-W., Ma, J.-P. & Gu, Z. (2025). Partitioned scheduling with shared resources on imprecise mixed-criticality multiprocessor systems. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 44(1), 65-76
Open this publication in new window or tab >>Partitioned scheduling with shared resources on imprecise mixed-criticality multiprocessor systems
2025 (English)In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, ISSN 0278-0070, E-ISSN 1937-4151, Vol. 44, no 1, p. 65-76Article in journal (Refereed) Published
Abstract [en]

Both resource access protocols and real-time scheduling algorithms have been extensively studied in classic embedded real-time systems. However, there has been relatively little attention given to the resource access protocol and real-time scheduling algorithms in mixed-criticality systems. In this article, we pay attention to the problem of scheduling an imprecise mixed-criticality (IMC) taskset on a multiprocessor platform with shared resources. First, we propose an IMC with MSRP (IMC-MSRP) resource access protocol, which ensures mutually exclusive access to the shared resources for the tasks. Second, we propose the schedulability test based on the IMC-multiprocessor stack resource policy (MSRP) for a given task-to-processor mapping method. Third, we propose a feasible task-to-processor mapping algorithm called resource-aware criticality-unaware worst-fit decreasing (RA-CU-WFD), which first assigns tasks sharing the same resources to the same processor to reduce the global waiting time of the tasks and thus improve the schedulability ratio of the system. And then assigns tasks based on the criticality-unaware worst-fit decreasing (CU-WFD) algorithm. Finally, we conduct experiments using the synthetic tasksets, and the experimental results show that the RA-CU-WFD outperforms the other approaches in terms of the schedulability ratio.

Place, publisher, year, edition, pages
IEEE, 2025
Keywords
Imprecise mixed-criticality (IMC), multicore, partitioned scheduling, shared resource
National Category
Computer Sciences Computer Engineering
Identifiers
urn:nbn:se:umu:diva-236659 (URN)10.1109/TCAD.2024.3433411 (DOI)001385382400028 ()2-s2.0-86000385200 (Scopus ID)
Funder
Swedish Research Council, 2023-04485The Kempe Foundations
Available from: 2025-03-26 Created: 2025-03-26 Last updated: 2025-03-26Bibliographically approved
Zhang, Y.-W., Ma, J.-P., Zheng, H. & Gu, Z. (2024). Criticality-aware EDF scheduling for constrained-deadline imprecise mixed-criticality systems. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 43(2), 480-491
Open this publication in new window or tab >>Criticality-aware EDF scheduling for constrained-deadline imprecise mixed-criticality systems
2024 (English)In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, ISSN 0278-0070, E-ISSN 1937-4151, Vol. 43, no 2, p. 480-491Article in journal (Refereed) Published
Abstract [en]

EDF-VD first focuses on the classic mixed-criticality task model in which all low criticality (LO) tasks are abandoned in the high criticality mode, which is an effective dynamic priority scheduling algorithm for mixed-criticality systems. However, it has low schedulability for the imprecise mixed-criticality (IMC) task model with constrained-deadlines, in which LO tasks are provided graceful degradation services instead of being abandoned. In this paper, we study how to improve schedulability for the IMC tasks model. First, we propose a novel criticality-aware EDF scheduling algorithm (CA-EDF) that tries to delay the LO task execution to improve schedulability. Second, we derive sufficient conditions of schedulability for CA-EDF based on the Demand Bound Function. Finally, we evaluate CA-EDF through extensive simulation. The experimental results indicate that CA-EDF can improve the schedulability ratio by about 13.10% compared to the existing algorithms.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE), 2024
Keywords
Computational modeling, demand bound function, graceful degradation, imprecise mixed-criticality, Industries, Job shop scheduling, Program processors, real-time scheduling, Scheduling algorithms, Switches, Task analysis
National Category
Computer Engineering Computer Sciences
Identifiers
urn:nbn:se:umu:diva-219518 (URN)10.1109/TCAD.2023.3318512 (DOI)001166816300020 ()2-s2.0-85181578343 (Scopus ID)
Funder
The Kempe Foundations
Available from: 2024-01-22 Created: 2024-01-22 Last updated: 2025-04-24Bibliographically approved
Zhang, Y.-W., Zheng, H. & Gu, Z. (2024). EDF-based energy-efficient semi-clairvoyant scheduling with graceful degradation. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 43(2), 468-479
Open this publication in new window or tab >>EDF-based energy-efficient semi-clairvoyant scheduling with graceful degradation
2024 (English)In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, ISSN 0278-0070, E-ISSN 1937-4151, Vol. 43, no 2, p. 468-479Article in journal (Refereed) Published
Abstract [en]

Recent works introduce a semi-clairvoyant model, in which the system mode transition is revealed on the arrival of high criticality jobs. To solve the problem of inconsistency between the correctness criterion for mixed-criticality systems (MCS) with a semi-clairvoyant and the actual situation, we study the problem of schedulability and energy in MCS with the semi-clairvoyant model in this paper. First, we propose a new correctness criterion for MCS with semi-clairvoyant and graceful degradation and develop the schedulability test based on Demand Bound Function methods denoted as SCS-GD. Second, we propose an energy-efficient semi-clairvoyant scheduling algorithm based on SCS-GD denoted as EE-SCS-GD. Finally, we conduct an experimental evaluation of SCS-GD and EE-SCS-GD by synthetically generated task sets. The experimental results show that SCS-GD can improve the schedulability ratio by 5.98% compared to existing algorithms while EE-SCS-GD can save 56.17% energy compared to SCS-GD.

Place, publisher, year, edition, pages
IEEE, 2024
Keywords
Degradation, DVFS, Dynamic scheduling, Energy consumption, Energy efficiency, energy management, graceful degradation, mixed-criticality, Scheduling algorithms, semi-clairvoyant, Switches, Task analysis
National Category
Computer Engineering
Identifiers
urn:nbn:se:umu:diva-216110 (URN)10.1109/TCAD.2023.3321970 (DOI)001166816300016 ()2-s2.0-85174801429 (Scopus ID)
Funder
The Kempe Foundations
Available from: 2023-11-14 Created: 2023-11-14 Last updated: 2024-04-26Bibliographically approved
Niu, L., Rawat, D. B., Zhu, D., Musselwhite, J., Gu, Z. & Deng, Q. (2024). Energy management for fault-tolerant (m,k)-constrained real-time systems that use standby-sparing. ACM Transactions on Embedded Computing Systems, 23(3), Article ID 36.
Open this publication in new window or tab >>Energy management for fault-tolerant (m,k)-constrained real-time systems that use standby-sparing
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2024 (English)In: ACM Transactions on Embedded Computing Systems, ISSN 1539-9087, E-ISSN 1558-3465, Vol. 23, no 3, article id 36Article in journal (Refereed) Published
Abstract [en]

Fault tolerance, energy management, and quality of service (QoS) are essential aspects for the design of real-time embedded systems. In this work, we focus on exploring methods that can simultaneously address the above three critical issues under standby-sparing. The standby-sparing mechanism adopts a dual-processor architecture in which each processor plays the role of the backup for the other one dynamically. In this way, it can provide fault tolerance subject to both permanent and transient faults. Due to its duplicate executions of the real-time jobs/tasks, the energy consumption of a standby-sparing system could be quite high. With the purpose of reducing energy under standby-sparing, we proposed three novel scheduling schemes: The first one is for (1, 1)-constrained tasks, and the second one and the third one (which can be combined into an integrated approach to maximize the overall energy reduction) are for general (m, k)-constrained tasks that require that among any k consecutive jobs of a task no more than (k − m) out of them could miss their deadlines. Through extensive evaluations and performance analysis, our results demonstrate that compared with the existing research, the proposed techniques can reduce energy by up to 11% for (1, 1)-constrained tasks and 25% for general (m, k)-constrained tasks while assuring (m, k)-constraints and fault tolerance as well as providing better user perceived QoS levels under standby-sparing.

Place, publisher, year, edition, pages
Association for Computing Machinery (ACM), 2024
Keywords
Energy efficiency, fault tolerance, QoS, real-time systems, standby-sparing
National Category
Embedded Systems
Identifiers
urn:nbn:se:umu:diva-225319 (URN)10.1145/3648365 (DOI)001228450800001 ()2-s2.0-85193901076 (Scopus ID)
Funder
Swedish Research Council, 2023-04485
Available from: 2024-06-10 Created: 2024-06-10 Last updated: 2024-06-10Bibliographically approved
Zhang, Y.-W., Zheng, H. & Gu, Z. (2024). Energy-aware adaptive mixed-criticality scheduling with semi-clairvoyance and graceful degradation. ACM Transactions on Embedded Computing Systems, 23(1), Article ID 11.
Open this publication in new window or tab >>Energy-aware adaptive mixed-criticality scheduling with semi-clairvoyance and graceful degradation
2024 (English)In: ACM Transactions on Embedded Computing Systems, ISSN 1539-9087, E-ISSN 1558-3465, Vol. 23, no 1, article id 11Article in journal (Refereed) Published
Abstract [en]

The classic Mixed-Criticality System (MCS) task model is a non-clairvoyance model in which the change of the system behavior is based on the completion of high-criticality tasks while dropping low-criticality tasks in high-criticality mode. In this paper, we simultaneously consider graceful degradation and semi-clairvoyance in MCS. We first propose the analysis for adaptive mixed-criticality with semi-clairvoyance denoted as C-AMC-sem. The so-called semi-clairvoyance refers to the system’s behavior change being revealed at the time that jobs are released. Moreover, we propose a new algorithm based on C-AMC-sem to reduce energy consumption. Finally, we verify the performance of the proposed algorithms via experiments upon synthetically generated tasksets. The experimental results indicate that the proposed algorithms significantly outperform the existing algorithms.

Place, publisher, year, edition, pages
Association for Computing Machinery (ACM), 2024
Keywords
energy-aware scheduling, graceful degradation, mixed-criticality systems, Real-time scheduling, semi-clairvoyance
National Category
Computer Sciences
Identifiers
urn:nbn:se:umu:diva-224838 (URN)10.1145/3632749 (DOI)001276220000011 ()2-s2.0-85184778531 (Scopus ID)
Funder
Swedish Research Council, 2023-04485The Kempe Foundations
Available from: 2024-06-11 Created: 2024-06-11 Last updated: 2025-04-24Bibliographically approved
Niu, L., Rawat, D. B., Musselwhite, J., Gu, Z. & Deng, Q. (2024). Energy-constrained scheduling for weakly hard real-time systems using standby-sparing. ACM Transactions on Design Automation of Electronic Systems, 29(2), Article ID 29.
Open this publication in new window or tab >>Energy-constrained scheduling for weakly hard real-time systems using standby-sparing
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2024 (English)In: ACM Transactions on Design Automation of Electronic Systems, ISSN 1084-4309, E-ISSN 1557-7309, Vol. 29, no 2, article id 29Article in journal (Refereed) Published
Abstract [en]

For real-time embedded systems, QoS (Quality of Service), fault tolerance, and energy budget constraint are among the primary design concerns. In this research, we investigate the problem of energy constrained standby-sparing for both periodic and aperiodic tasks in a weakly hard real-time environment. The standby-sparing systems adopt a primary processor and a spare processor to provide fault tolerance for both permanent and transient faults. For such kind of systems, we firstly propose several novel standby-sparing schemes for the periodic tasks which can ensure the system feasibility under tighter energy budget constraint than the traditional ones. Then based on them integrated approachs for both periodic and aperiodic tasks are proposed to minimize the aperiodic response time whilst achieving better energy and QoS performance under the given energy budget constraint. The evaluation results demonstrated that the proposed techniques significantly outperformed the existing state-of-the-art approaches in terms of feasibility and system performance while ensuring QoS and fault tolerance under the given energy budget constraint.

Place, publisher, year, edition, pages
Association for Computing Machinery (ACM), 2024
Keywords
Energy constraint, fault tolerance, quality of service, real-time scheduling, standby-sparing
National Category
Embedded Systems Computer Systems
Identifiers
urn:nbn:se:umu:diva-223744 (URN)10.1145/3631587 (DOI)001193665600006 ()2-s2.0-85190598772 (Scopus ID)
Funder
The Kempe Foundations
Available from: 2024-05-06 Created: 2024-05-06 Last updated: 2024-05-06Bibliographically approved
Feng, Z., Wu, C., Deng, Q., Lin, Y., Gao, S. & Gu, Z. (2024). On the scheduling of fault-tolerant time-sensitive networking with IEEE 802.1CB. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 43(6), 1715-1728
Open this publication in new window or tab >>On the scheduling of fault-tolerant time-sensitive networking with IEEE 802.1CB
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2024 (English)In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, ISSN 0278-0070, E-ISSN 1937-4151, Vol. 43, no 6, p. 1715-1728Article in journal (Refereed) Published
Abstract [en]

Time-sensitive networking (TSN) has become the most popular technique in modern safety-critical automotive and industrial automation networks by providing deterministic transmission policies. However, the data of TSN messages may be affected by transient faults. IEEE 802.1CB, a reliability standard in TSN, protects against such faults by providing disjoint redundant routes for each stream. However, the unique assumption may present a new challenge, i.e., an inadequate number of redundant routes that may negatively impact stream scheduling. This article presents an offline fault-tolerant TSN scheduling approach that considers such impacts for real-time streams (such as time-trigger (TT) and audio video bridging (AVB) streams). Specifically, we intend to calculate the minimum upper bound number of disjoint routes required for each stream to meet the reliability requirements, subsequently enhancing the network's schedulability. We also propose a service degradation function for AVB streams when the network is under heavy load caused by redundant transmissions of TT streams. This function will maintain schedulability and reliability for AVB streams. Experiments with small- and large-scale synthetic networks show the efficiency.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE), 2024
Keywords
Circuit faults, Computer network reliability, Fault tolerance, Fault tolerant systems, Fault-Tolerant Scheduling, Job shop scheduling, Number of Redundant routes, Reliability, Service Degradation, Time-Sensitive Networking, Time-Triggered Streams, Transient analysis
National Category
Computer Engineering
Identifiers
urn:nbn:se:umu:diva-220141 (URN)10.1109/TCAD.2024.3352925 (DOI)001230178400006 ()2-s2.0-85182925116 (Scopus ID)
Funder
Swedish Research Council, 2023-04485
Available from: 2024-02-13 Created: 2024-02-13 Last updated: 2024-06-26Bibliographically approved
Jiang, W., Gu, Z. & Zhuo, C. (2024). Preface. In: 2024 4th international conference on intelligent technology and embedded systems (ICITES): . Paper presented at 4th International Conference on Intelligent Technology and Embedded Systems, ICITES 2024 (pp. vi-vi). Paper presented at 4th International Conference on Intelligent Technology and Embedded Systems, ICITES 2024. IEEE
Open this publication in new window or tab >>Preface
2024 (English)In: 2024 4th international conference on intelligent technology and embedded systems (ICITES), IEEE, 2024, p. vi-viChapter in book (Other academic)
Place, publisher, year, edition, pages
IEEE, 2024
National Category
Computer Sciences Computer Systems
Identifiers
urn:nbn:se:umu:diva-234869 (URN)10.1109/ICITES62688.2024.10777450 (DOI)2-s2.0-85215706126 (Scopus ID)9798331506292 (ISBN)9798331506285 (ISBN)9798331506308 (ISBN)
Conference
4th International Conference on Intelligent Technology and Embedded Systems, ICITES 2024
Note

Preface to the proceedings of the 4th International Conference on Intelligent Technology and Embedded Systems, ICITES 2024, Chengdu, China, September 20-23, 2024

Available from: 2025-02-07 Created: 2025-02-07 Last updated: 2025-02-07Bibliographically approved
Jiang, Z., Dai, X., Burns, A., Audsley, N., Gu, Z. & Gray, I. (2023). A high-resilience imprecise computing architecture for mixed-criticality systems. IEEE Transactions on Computers, 72(1), 29-42
Open this publication in new window or tab >>A high-resilience imprecise computing architecture for mixed-criticality systems
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2023 (English)In: IEEE Transactions on Computers, ISSN 0018-9340, E-ISSN 1557-9956, Vol. 72, no 1, p. 29-42Article in journal (Refereed) Published
Abstract [en]

Conventional mixed-criticality systems (MCS)s are designed to terminate the execution of less critical tasks in exceptional situations so that the timing properties of more critical tasks can be preserved. Such a strategy can be controversial and has proven difficult to implement in practice, as it can lead to hazards and reduced functionality due to the absence of the discarded tasks. To mitigate this issue, the imprecise mixed-critically system model (IMCS) has been proposed. In such a model, instead of completely dropping less-critical tasks, these tasks are executed as much as possible through the use of decreased computation precision. Although IMCS could effectively improve the survivability of the less-critical tasks, it also introduces three key drawbacks - run-time computation errors, real-time performance degradation, and lack of flexibility. In this paper, we present a novel IMCS framework, which can (i) mitigate the computation errors caused by imprecise computation; (ii) achieve real-time performance near to that of a conventional MCS; (iii) enhance system-level throughput; and (iv) provide flexibility for run-time configuration. We describe the design details of HIART-MCS, and then present the corresponding theoretical analysis and optimisation method for its run-time configuration. Finally, HIART-MCS is evaluated against other MCS frameworks using a variety of experimental metrics.

Place, publisher, year, edition, pages
IEEE, 2023
Keywords
Clocks, Computational modeling, Hardware, Hardware/Software Co-design, Imprecise Computing, Real-Time Mixed-Criticality Systems, Registers, Schedulability Analysis, Software, Task analysis, Timing
National Category
Computer Sciences Computer Engineering
Identifiers
urn:nbn:se:umu:diva-199468 (URN)10.1109/TC.2022.3202721 (DOI)000899952600004 ()2-s2.0-85137584727 (Scopus ID)
Available from: 2022-09-26 Created: 2022-09-26 Last updated: 2023-09-05Bibliographically approved
Saremi, A., Ramkumar, B., Ghaffari, G. & Gu, Z. (2023). An acoustic echo canceller optimized for hands-free speech telecommunication in large vehicle cabins. EURASIP Journal on Audio, Speech, and Music Processing, 2023(1), Article ID 39.
Open this publication in new window or tab >>An acoustic echo canceller optimized for hands-free speech telecommunication in large vehicle cabins
2023 (English)In: EURASIP Journal on Audio, Speech, and Music Processing, ISSN 1687-4714, E-ISSN 1687-4722, Vol. 2023, no 1, article id 39Article in journal (Refereed) Published
Abstract [en]

Acoustic echo cancelation (AEC) is a system identification problem that has been addressed by various techniques and most commonly by normalized least mean square (NLMS) adaptive algorithms. However, performing a successful AEC in large commercial vehicles has proved complicated due to the size and challenging variations in the acoustic characteristics of their cabins. Here, we present a wideband fully linear time domain NLMS algorithm for AEC that is enhanced by a statistical double-talk detector (DTD) and a voice activity detector (VAD). The proposed solution was tested in four main Volvo truck models, with various cabin geometries, using standard Swedish hearing-in-noise (HINT) sentences in the presence and absence of engine noise. The results show that the proposed solution achieves a high echo return loss enhancement (ERLE) of at least 25 dB with a fast convergence time, fulfilling ITU G.168 requirements. The presented solution was particularly developed to provide a practical compromise between accuracy and computational cost to allow its real-time implementation on commercial digital signal processors (DSPs). A real-time implementation of the solution was coded in C on an ARM Cortex M-7 DSP. The algorithmic latency was measured at less than 26 ms for processing each 50-ms buffer indicating the computational feasibility of the proposed solution for real-time implementation on common DSPs and embedded systems with limited computational and memory resources. MATLAB source codes and related audio files are made available online for reference and further development.

Place, publisher, year, edition, pages
Springer, 2023
Keywords
Acoustic echo cancelation, Adaptive filters, Automotive speech processing, Automotive voice assistant, Hands-free telephony, Keyword spotting, NLMS, Speech signal enhancement
National Category
Signal Processing
Identifiers
urn:nbn:se:umu:diva-215398 (URN)10.1186/s13636-023-00305-7 (DOI)001082528400001 ()2-s2.0-85173557384 (Scopus ID)
Available from: 2023-10-27 Created: 2023-10-27 Last updated: 2025-04-24Bibliographically approved
Organisations
Identifiers
ORCID iD: ORCID iD iconorcid.org/0000-0003-4228-2774

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