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Parallel cache assignment applied to a bulge-chasing numerical linear algebra kernel
Umeå University, Faculty of Science and Technology, Department of Computing Science.
2016 (English)Independent thesis Basic level (degree of Bachelor), 10 credits / 15 HE creditsStudent thesis
Abstract [en]

An algorithm executing in parallel often performs better than its non-parallel counter-part, but they rarely scale 1:1 with the increased number of processing units performing work. This thesis aims to investigate the possible performance increase of applying parallel cache assignment (PCA), a technique to manage the cache memory of a computer in order to maximize its use, to a parallel algorithm reducing two matrices. Two versions of the same algorithm is compared in execution time and speedup, and run on two different systems, a server computer with up to 48 cores with a NUMA memory architecture and a desktop PC with 4 cores with an SMP memory architecture. The test results indicate that there is indeed a performance increase to be found on both systems by applying the PCA technique.

Place, publisher, year, edition, pages
2016.
Series
UMNAD, 1089
National Category
Engineering and Technology
Identifiers
URN: urn:nbn:se:umu:diva-128613OAI: oai:DiVA.org:umu-128613DiVA: diva2:1054816
Educational program
Bachelor of Science Programme in Computing Science
Supervisors
Examiners
Available from: 2016-12-09 Created: 2016-12-09 Last updated: 2016-12-09Bibliographically approved

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CiteExportLink to record
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Citation style
  • apa
  • ieee
  • modern-language-association-8th-edition
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  • Other style
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Language
  • de-DE
  • en-GB
  • en-US
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  • nn-NO
  • nn-NB
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Output format
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